The present invention relates to imaging devices, and, more particularly, to image sensor units formed using stacked image sensor and processor integrated circuits.
Image sensors are commonly used in electronic devices such as cellular telephones, cameras, and computers to capture images. In a typical arrangement, an electronic device is provided with an image sensor integrated circuit that contains control circuitry for controlling an associated image sensor pixel array. The control circuitry includes row driver circuits for generating control signals such as row select signals. The control signals also include column readout circuitry that converts analog image data signals from data lines in the image sensor pixel array into digital image data. Image processing tasks can sometimes be at least partly performed using image-processing circuits in the image processor integrated circuit. In many situations, however, use of a processor integrated circuit that is separate from the sensor integrated circuit is desirable. For example, separate image processing chips may be used to handle input-output functions and image processing functions that require more processing power than is available on an image sensor integrated circuit.
In many image sensor applications, space is limited. It may also be desirable to minimize the number of integrated circuit components that are used in a given device (e.g., to reduce part count and assembly costs). As a result, image processing chips are sometimes stacked together with an image sensor integrated circuit. The resulting stacked arrangements are susceptible to overheating and may be undesirably tall (i.e., thick).
It would be desirable to be able to provide improved image sensors with stacked dies.